Protocol analysis of embedded system design

Today’s world of Embedded Computing has many challenges to develop a product which satisfy all the different requirements (time to market, performances, robustness, prices,..) and among those the exponential increase of the data to handle requires to have faster and faster multiGigaBit serial connections among the various devices. So in the market are emerging Engineers who are specialized in the Signal Integrity aspect of the serial links. These Engineers have to have competence in the Digital world as well in the Analog world, S-Parameters and have to be able to make hardware Engineer work in conjunction with Software/System Engineer to achieve the requirements listed above. Teledyne LeCroy with the ProtoSync Solution address these critical aspects.

A common requirements and challenges in High Speed Serial Links is:

Debug Dynamic Equalization Issues
Dynamic equalization is a link initialization process where training sequences communicate transmitter and receiver parameters to establish a link, such as in PCI Express 3.0 and forthcoming standards USB2/3, SATA, SAS, FC,…
Debugging dynamic equalization is usually much easier if both analog waveforms and high level protocol packet data are available simultaneously.

Ideal for Embedded Designs
More mature standards are increasingly becoming embedded in system designs. It is usually simple to connect an oscilloscope to the embedded system, and the debug and validation system engineer is quite familiar with the operation of an oscilloscope. By providing protocol analysis views using physical layer oscilloscope captures as a source, complex problems can be more easily debugged.

Neem voor meer informatie contact op met AR Benelux.