The thermal stress and lifetime of power switches are largely determined by the thermal cycling. In this presentation, a dynamic gate driver that supplies an adjustable gate voltage is proposed to mitigate thermal stress for lifetime improvement. The dynamic gate voltage profile is derived from an analytical transistor model and controlled by direct adjustment based on the load current. The switch power losses are compensated, resulting in an increased average junction temperature T_Javg with reduced Image swings. An equivalent circuit model of the power switch in a full bridge converter was built up for verification of this concept. After that, the cycles to failure estimation was conducted which shows a lifetime improvement by a factor of two. Finally a three-level dynamic gate driver is designed and analysed. Currently, prototyping of the dynamic gate driver is carried out and in the future a full bridge converter testing platform will be included for experimental verification before June/2019.
Lie Wang, TU/e